1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to methods for forming damascene structures, including damascene structures that include an air gap.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices on a chip doubles every two years. Today's fabrication facilities are routinely producing devices having 0.1 μm feature sizes, and tomorrow's facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries has generated a demand for layers having lower dielectric constant (k) values because the capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. In particular, insulators having low dielectric constants, less than about 4.0, are desirable. Examples of insulators having low dielectric constants include spin-on glass, fluorine-doped silicon glass (FSG), carbon-doped oxide, and polytetrafluoroethylene (PTFE), which are all commercially available.
More recently, low dielectric constant organosilicon layers having k values less than about 3.5 have been developed. One method that has been used to develop low dielectric constant organosilicon layers has been to deposit the layers from a gas mixture comprising an organosilicon compound and a compound comprising thermally labile species or volatile groups and then post-treat the deposited layers to remove the thermally labile species or volatile groups, such as organic groups, from the deposited layers. The removal of the thermally labile species or volatile groups from the deposited layers creates nanometer-sized voids in the layers, which lowers the dielectric constant of the layers, e.g., to about 2.5, as air has a dielectric constant of approximately 1.
However, in view of the continuing decrease in integrated circuit feature sizes and increase in circuit density, there remains a need for a method of forming devices that have dielectric layers with even lower dielectric constants.